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INTEGRATED CIRCUITS
IN2 4
GND2 3
OUT2 2
VCC 1
AMP2
AMP1
5 ENABLE
6 IN1
7 GND1
8 OUT1
SA5200 RF dual gain-stage
Product Specification Replaces data of Oct 10 1991 IC17 Data Handbook 1997 Nov 07
Philips Semiconductors
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
DESCRIPTION
The SA5200 is a dual amplifier with DC to 1200MHz response. Low noise (NF = 3.6dB) makes this part ideal for RF front-ends, and a simple power-down mode saves current for battery operated equipment. Inputs and outputs are matched to 50. The enable pin allows the designer the ability to turn the amplifiers on or off, allowing the part to act as an amplifier as well as an attenuator. This is very useful for front-end buffering in receiver applications.
PIN CONFIGURATION
D Package
1 2 3 4 8 7 6 5
VC
OUT1 GND1 IN1 ENABLE
C OUT2
GND2 IN2
FEATURES
* Dual amplifiers * DC - 1200MHz operation * Low DC power consumption (4.2mA per amplifier @ VCC = 5V) * Power-Down Mode (ICC = 95A typical) * 3.6dB noise figure at 900MHz * Unconditionally stable * Fully ESD protected * Low cost
ORDERING INFORMATION
DESCRIPTION 8-Pin Plastic Small Outline (Surface-mount)
SR00166
* Supply voltage 4-9V * Gain S21 = 7dB at f = 1GHz * Input and output match S11, S22 typically <-14dB
APPLICATIONS
Figure 1. Pin Configuration
* Cellular radios * RF IF strips * Portable equipment
TEMPERATURE RANGE -40-+85C ORDER CODE SA5200D DWG # SOT96-1
BLOCK DIAGRAM
IN2 4 GND2 3 OUT2 2 VCC 1
AMP2
AMP1
5 ENABLE
6 IN1
7 GND1
8 OUT1
SR00167
Figure 2. Block Diagram
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC TA TJ Supply voltage Operating ambient temperature range SA Grade Operating junction temperature SA Grade PARAMETER RATING 4.0 to 9.0 -40 to +85 -40 to +105 UNITS V C C
1997 Nov 07
5-2
853-1578 18662
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
ABSOLUTE MAXIMUM RATINGS
SYMBOL VCC PD TJMAX PMAX TSTG Supply voltage1 PARAMETER RATING -0.5 to +9 780 150 +20 -65 to +150 UNITS V mW C dBm C
Power dissipation, TA = 25C (still air)2 8-Pin Plastic SO Maximum operating junction temperature Maximum power input/output Storage temperature range
NOTE: 1. Transients exceeding 10.5V on VCC pin may damage product. 2. Maximum dissipation is determined by the operating ambient temperature and the thermal resistance, JA: 8-Pin SO: JA = 158C/W
DC ELECTRICAL CHARACTERISTICS
VCC = +5V, TA = 25C; unless otherwise stated. SYMBOL VCC ICC Supply voltage VCC = 5V, ENABLE = High Total supply current VCC = 5V, ENABLE = Low VCC = 9V, ENABLE = High VCC = 9V, ENABLE = Low VT VIH VIL IIL IIH VIDC,ODC TTL/CMOS logic threshold voltage1 Logic 1 level Logic 0 level Enable input current Enable input current Input and output DC levels Power-up mode Power-down mode Enable = 0.4V Enable = 2.4V 2.0 -0.3 -1 -1 0.6 0 0 0.83 PARAMETER TEST CONDITIONS LIMITS MIN 4 6.4 TYP 5.0 8.4 95 17.8 320 1.25 VCC 0.8 1 1 1.0 MAX 9.0 10.4 255 22.2 960 UNITS V mA A mA A V V V A A V
NOTE: 1. The ENABLE input must be connected to a valid logic level for proper operation of the SA5200.
AC ELECTRICAL CHARACTERISTICS1
VCC = +5V, TA = 25C, either amplifier, enable = 5V; unless otherwise stated. SYMBOL S21 S22 S12 S11 P-1 NF IP2 IP3 ISOL POUT S21 Insertion gain Output return loss Reverse isolation Input return loss Output 1dB compression point Noise figure in 50 Input second-order intercept point Input third-order intercept point Amplifier-to-amplifier isolation2 Saturated output power Insertion gain when disabled PARAMETER TEST CONDITIONS f = 100MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 900MHz f = 100MHz f = 900MHz LIMITS MIN 9.2 5.2 TYP 11 7.5 -14.3 -17.9 -16.5 -4.3 3.6 +4.3 -1.8 -25 -1.7 -13 -13.5 MAX 13.2 UNITS dB dB dB dB dBm dB dBm dBm dB dBm dB
NOTE: 1. All measurements include the effects of the SA5200 Evaluation Board (see Figure 4). Measurement system impedance is 50. 2. Input applied to one amplifier, output taken at the other output. All ports terminated into 50.
1997 Nov 07
5-3
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
APPLICATIONS
SA5200 is a user-friendly, wide-band, unconditionally stable, low power dual gain amplifier circuit. There are several advantages to using the SA5200 as a high frequency gain block instead of a discrete implementation. First is the simplicity of use. The SA5200 does not need any external biasing components. Due to the higher level of integration and small footprint (SO8) package it occupies less space on the printed circuit board and reduces the manufacturing cost of the system. Also the higher level of integration improves the reliability of the amplifier over a discrete implementation with several components. The power down mode in the SA5200 helps reduce power consumption in applications where the amplifiers can be disabled. And last but not the least is the impedance matching at inputs and outputs. Only those who have toiled through discrete transistor implementations for 50 input and output impedance matching can truly appreciate the elegance and simplicity of the SA5200 input and output impedance matching to 50. A simplified equivalent schematic is shown in 3. Each amplifier is composed of an NPN transistor with an Ft of 13GHz in a classical series-shunt feedback configuration. The two wideband amplifiers are biased from the same bias generator. In normal operation each amplifier consumes about 4mA of quiescent current (at VCC = 5V). In the disable mode the device consumes about 90A of current, most of it is in the TTL enable buffer and the bias generator. The input impedance of the amplifiers is 50. The amplifiers have typical gain of 11dB at 100MHz and 7dB of gain at 1.2GHz. It can be seen from 3 that any inductance between Pin 7, 3 and the ground plane will reduce the gain of the amplifiers at higher frequencies. Thus proper grounding of Pins 7 and 3 is essential for maximum gain and increased frequency response. 4 shows the printed circuit board layout and the component placement for the SA5200 evaluation board. The AC coupling capacitors should be selected such that at they are shorts at the desired frequency of operation. Since most low-cost large value surface mount capacitors cease to be simply capacitors in the UHF range and exhibit an inductive behavior, it is recommended that high frequency chip capacitors be utilized in the circuit. A good power supply bypass is also essential for the performance of the amplifier and should be as close to the device as practical. 5 shows the typical frequency response of the two channels of SA5200. The low frequency gain is about 11dB at 100MHz and slowly drops off to 10dB at 500MHz. The gain is about 8dB at 900MHz and 7dB at 1.2 GHz which is typical of SA5200 with a good printed circuit board layout. It can also be seen that both channels have a very well matched frequency response and matched gain to within 0.1dB at 100MHz and 0.2dB at 900MHz.
SA5200 finds applications in many areas of RF communications. It is an ideal gain block for high performance, low cost, low power RF communications transceivers. A typical radio transceiver front-end is shown in 6. This could be the front-end of a cellular phone, a VHF/ UHF hand-held transceiver, UHF cordless telephone or a spread spectrum system. The SA5200 can be used in the receiver path of most systems as an LNA and pre-amplifier. The bandpass filter between the two amplifiers also minimize the noise into the first mixer. In the transmitter path, SA5200 can be used as a buffer to the VCO and isolate the VCO from any load variations due to the power level changes in the power amplifier. This improves the stability of the VCOs. The SA5200 can also be used as a pre-driver to the power amplifier modules. The two amplifiers in SA5200 can be easily cascaded to have a 13dB gain block at 900MHz. At 100MHz the gain will be 22dB and a noise figure of about 5.5dB. The SA5200 can be operated at a higher voltage up to 9V for much improved 1dB output compression point and higher 3rd order intercept point. Several stages of SA5200 can also be cascaded and be used as an IF amplifier strip for DBS/TV/GPS receivers. 7 shows a 60dB gain IF strip at 180MHz. The noise figure for the cascaded amplifier chain is given by equation 1. NF (total) = NF1 + NF2/G1 + NF3/G1*G2 + NF4/G1*G2*G3 + ... (Equation. 1) NOTE: The noise figure and gain should not be in dB in the above equation. Since the noise figure for each stage is about 3.6dB and the gain is about 11dB, the noise figure for the 60dB gain IF strip will be about 6.4dB. In applications where a single amplifier is required with a 7.5dB gain at 900MHz and current consumption is of paramount importance (battery powered receivers), the amplifier A1 can be used and amplifier A2 can be disabled by leaving GND2 (Pin 3) unconnected. This will reduce the total current consumption for the IC to a meager 4mA. The ENABLE pin is useful for Time-Division-Duplex systems where the receiver can be disabled for a period of time. In this case the overall system supply current will be decreased by 8mA. The ENABLE pin can also be used to improve the system dynamic range. For input levels that are extremely high, the SA5200 can be disabled. In this case the input signal is attenuated by 13dB. This prevents the system from being overloaded as well as improves the system's overall dynamic range. In the disabled condition the SA5200 IP3 increases to nearly +20dBm.
1997 Nov 07
5-4
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
PIN 1
VCC GND1
PIN 5 ENABLE
BIAS GENERATOR
RF PIN 6 IN1
RC
PIN 8 OUT1 PIN 4 IN2
RF
RC
PIN 2 OUT2
RE AMP1 PIN 7 GND1 AMP2
RE PIN 3 GND2
SR00168
Figure 3. Simplified Equivalent Schematic of SA5200
SR00169
Figure 4. Printed Circuit Board Layout of the SA5200 Evaluation Board
1997 Nov 07
5-5
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
SR00170
Figure 5. Typical Frequency Response of SA5200 in a 50 System
FILTER
IF OUT ANTENNA NE5200 ENABLE Rx
DUPLEX FILTER LO NE602A
NE5200 POWER AMP FILTER ENABLE Tx MODULATION VCO
SR00171
Figure 6. Typical Radio Transceiver Front-End 1997 Nov 07 5-6
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
IF IN
NE5200
NE5200
NE5200
IF OUT
IF OUT
SR00172
Figure 7. 60dB IF Gain Block for 100-300MHz IF for GPS/DBS Systems
20
-5
18 4V 16 -10 5V 14 I CC (mA) 6V 7V 12 +85C 10 -40C 8 -20 S 11 (dB) -15 9V
6 TA = +25C -25 4 5 6 VCC (V) 7 8 9 10 100 FREQUENCY (MHz) 1000 2000
4
SR00173
SR00174
Figure 8. Supply Current vs Supply Voltage and Temperature
-8
Figure 10. Input Match vs Frequency and VCC
500 450
-10 400
+85C
+25C 350 300 I CC ( A) 250 +25C 200 150 -40C 100 -18 50 0 4 5 6 VCC (V) 7 8 9 VCC = 5V -20 10 100 FREQUENCY (MHz) 1000 2000 -16 S 11 (dB) +85C -14 -12 -40C
SR00175
SR00176
Figure 9. Disabled Supply Current vs VCC and Temperature
Figure 11. Input Match vs Frequency and Temperature
1997 Nov 07
5-7
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
14 9V 7V 6V 5V 10 4V
12
-40C +25C +85C
12
10
8 S 21 (dB) S 21 (dB) TA = +25C 0 10 100 FREQUENCY (MHz) 1000 2000 0 10 100 FREQUENCY (MHz) 1000 2000 8
6
6
4 4
2
2 VCC = 5V
SR00177
SR00180
Figure 12. Insertion Gain vs Frequency and VCC
Figure 14. Insertion Gain vs Frequency and Temperature
10
10 9.5
9.5
9V 7V 9 8.5 6V -40C 8 S 21 (dB) 5V 7.5 7 +25C +85C
9
8.5 S21 (dB)
8 4V 7.5
6.5 7 6 6.5 TA = +25C 6 800 850 900 950 1000 1050 1100 1150 1200 5.5 VCC = 5V 5 800 850 900 950 1000 1050 1100 1150 1200
FREQUENCY (MHz)
SR00178
FREQUENCY (MHz)
SR00179
Figure 13. Insertion Gain vs Frequency and VCC -- Expanded Detail --
Figure 15. Insertion Gain vs Frequency and Temperature - Expanded Detail -
1997 Nov 07
5-8
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
12 11 10
-10
9V 7V 6V
-15 9 8 S 21 (dB) CH1 7 6 5 4 3 2 10 100 FREQUENCY (MHz) 1000 2000 CH2 -25 VCC = 5V TA = +25C S 22 (dB) 5V 4V
-20
TA = +25C
-30 10 100 FREQUENCY (MHz) 1000 2000
SR00181
SR00182
Figure 16. Insertion Gain Matching (CH1 vs CH2) vs Frequency
Figure 18. Output Match vs Frequency and VCC
-10
-10 +85C
-12
-12 +25C
-14 S 12 (dB) S 22 (dB)
-14 -40C
-16
-16
+85C -18 VCC = 5V -20 -18
+25C -40C
-20 VCC = 5V -22 10 100 FREQUENCY (MHz) 1000 2000
-22 10 100 FREQUENCY (MHz) 1000 2000
SR00183
SR00184
Figure 17. Reverse Insertion Gain vs Frequency and Temperature
Figure 19. Output Match vs Frequency and Temperature
1997 Nov 07
5-9
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
-0 S11 S22 -5
0
-20
-10 S (dB) S12 S21 S 21 (dB)
-40 ENABLED
-15
-60 DISABLED
-20 VCC = 5V TA = +25C -25 10 100 FREQUENCY (MHz) 1000 2000
-80
VCC = 5V TA = +25C -100 10 100 FREQUENCY (MHz) 1000 2000
Figure 20. S-parameters vs Frequency for Disabled Amplifier
Figure 22. CH1 Input to CH2 Output Isolation vs Frequency
-10 4
3.9 CH2 CH1 -15 S 21 (dB) 3.7 NF (dB) 3.8 TA = +25C
3.6
-20
3.5 4V 3.4 VCC = 5V TA = +25C 3.3 9V 5V 6V & 7V 10 100 FREQUENCY (MHz) 1000 2000 3.2 10 100 FREQUENCY (MHz) 1000 2000
-25
Figure 21. Insertion Gain Matching Disabled (CH1 vs CH2) vs Frequency
Figure 23. Noise Figure vs Frequency and VCC in a 50 System
1997 Nov 07
5-10
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
5 TA = +25C
16 100MHz 14 9V 12 500MHz
0 (dBm) 7V (dBm) 10 900MHz
P-1
6V
8
DISABLED
IP3 -5 5V 4 6 4V -10 10 100 FREQUENCY (MHz) 1000 2000 2 TA = +25C 0 4 5 6 VCC (V) 7 8 9
SR00185
SR00186
Figure 24. 1dB Output Compression Point vs Frequency and VCC
Figure 26. Third-Order Output Intercept vs Frequency and VCC
5
20 DISABLED 9V 15 7V
0 PSAT (dBm)
6V 10 5V (dBm) IP3 4V 5 0 f = 900MHz TA = +25C TA = +25C -5 10 100 FREQUENCY (MHz) 1000 2000 4 5 6 VCC (V) 7 8 9
-5
-10
SR00187
SR00188
Figure 25. Saturated Output Power vs Frequency and VCC
Figure 27. Third-Order Input Intercept vs Frequency and VCC
1997 Nov 07
5-11
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
25
25
DISABLED 20 20
900MHz
IP2
IP 2 (dBm) DISABLED 500MHz
15 (dBm)
15
10
10
5 100MHz TA = +25C 0 4 5 6 VCC (V) 7 8 9
5 TA = +25C f = 900MHz 0 4 5 6 VCC (V) 7 8 9
SR00191
SR00190
Figure 28. Second-Order Output Intercept vs Frequency and VCC
Figure 30. Second-Order Input Intercept vs Frequency and VCC
ENABLE
ENABLE ENABLE
OUT OUT
OUT
SR00189
SR00192
Figure 29. Switching Speed; fIN = 10MHz at -26dBm, VDD = 5V, Coupling Capacitors Set to 0.01F
Figure 31. Switching Speed; fIN = 50MHz at -26dBm, VDD = 5V, Coupling Capacitors Set to 100pF
1997 Nov 07
5-12
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
SO8: plastic small outline package; 8 leads; body width 3.9mm
SOT96-1
1997 Nov 07
13
Philips Semiconductors
Product specification
RF dual gain-stage
SA5200
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. (c) Copyright Philips Electronics North America Corporation 1993 All rights reserved. Printed in U.S.A.
1997 Nov 07
14

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